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Verified compilation of CakeML to multiple machine-code targets


Anthony Fox, Magnus Myreen, Yong Kiam Tan and Ramana Kumar

University of Cambridge

Chalmers University of Technology

Carnegie Mellon University



This paper describes how the latest CakeML compiler sup- ports verified compilation down to multiple realistically modelled target architectures. In particular, we describe how the compiler definition, the various language semantics, and the correctness proofs were organised to minimize target- specific overhead. With our setup we have incorporated compilation to four 64-bit architectures, ARMv8, x86-64, MIPS-64, RISC-V, and one 32-bit architecture, ARMv6. Our correctness theorem places particular emphasis on pos- sible interference from the external environment: the top- level correctness statement takes into account execution of foreign code and per-instruction interference from external processes, such as that of interrupt handlers in operating sys- tems. The entire CakeML development is formalised in the HOL4 theorem prover.

BibTeX Entry

    author           = {Fox, Anthony and Myreen, Magnus and Tan, Yong Kiam and Kumar, Ramana},
    month            = jan,
    year             = {2017},
    keywords         = {cakeml},
    title            = {Verified Compilation of {CakeML} to Multiple Machine-Code Targets},
    booktitle        = {Certified Programs and Proofs 2017},
    pages            = {125--137},
    address          = {Paris, France}


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